Hello group.
I am trying to get my Spartan3-based design to partially reconfigure itself using Answer Record #18416 as a guideline
To carry out the reconfiguration process, my board exports some FPGA IOs to the external configuration interface and then these are controlled by the custom embedded MCU running inside the same FPGA
I have never been able to successfully reconfigure the device using this method. Perhaps, as the answer record points out, this has something to do with the unmodified bits resetting during reconfiguration. Are there any other procedures or gotchas I am not aware of? The method to break down the design for partial re-configuration is really cumbersome and I may be doing several mistakes there. Is there a way to instruct ISE to break the design automatically?
Also, does somebody know if there is an update on the status of the hidden ICAP of the SP-3? Is this actually usable? I recall reading in a previous post some months ago that someone at Xilinx (Austin Lesea?) was going to find out if there was a way to make it work.
The whole idea of my project is to use partial-reconfiguration to support many types of audio filters (this is an audio effects processor). Maybe it is going to be much better to ditch my current SP-3 design in favor of a Virtex one that supports modular blocks. Am I right?
Best regards.
-- PabloBleyerKocik / pbleyer /"Reliable software must kill people reliably." @embedded.cl / -- Andy Mickel