I am currently trying to use the SN54LVT8980A JTAG TAP MASTER controller to program FPGA PROMS. I have put the chip on a logic analyzer and have found that I get nothing out (no TDO, no CLK when in gated mode, not TMS) when executing a instruction register scan or when I execute a data register scan. However, I do get the above mentioned signals when I execute either a recirculate instruction scan or a recirculate data scan.
Moreover, I seem to have to write 5 times to the TDO register before the STATUS register indicates that it is full.
Has anyone ever used this chip before? Maybe someone could send me a code snippet to get it to perform a simple instruction-scan or data-scan. Once I get that going I can probably implement my software-based PROM programmer going used this chip.
Thanks,
Andy