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JTAG IR length detection

We are currently building a board at work that will have connectors for X number of boards (that is between 0 and the number of connectors on the board) which will have FPGAs on them. We are looking at using different types of FPGAs for price reasons on different boards (make some boards cheaper than others etc). My task is to provide an in circuit FPGA configuration mechanism (we're looking at using Xilinx mostly for now) using JTAG. I have the code which successfully goes out and determines the number of devices in the scan chain, but am having difficulty determining how to detect the size of the instruction register for each device. Can someone point me to some code?

Thanks,

slide

Reply to
slide_o_mix
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Can you detect the size of the instruction register? Xilinx iMpact software seems to need you to enter this or use a pre-built BSDL file for the device you found.

Reply to
Gabor

AFAIK this problem can't be solved. Thats why every JTAG programm I know need this information frm the user or BSDL file.

Regards Falk

Reply to
falk.brunner

Once you know the number of devices in the chain, you could retrieve their IDCODEs and get the instruction register length for each device from a look-up table or database. The UrJTAG software

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applies this mechanism to identify the elements of the scan chain automatically.

Arnim

Reply to
Arnim

Hi,

Knowing the number of devices in a JTAG chain is simple: after a reset (TRSTN = 0 or 5x TMS = 1) all devices with the IDCODE instruction must reset to this command, the others must reset to the BYPASS instruction. The IDCODE is always 32 bits with bit[0] = 1 and BYPASS register always captures a 0.

Finding the total length of the IR registers is do-able, but rather difficult for individual registers: the IR register should capture 01 (or is it 10) als it's 2 lsbs. Using the above technique to get the IDCODEs and then going on woith the BSDL files is the best approach.

Regards, Alvin.

Reply to
Alvin Andries

You don't need to find out the IR length. What your trying to do is called "blind interrogation" in the JTAG spec. As you clock into Test logic Reset all devices enter manufacturers ID mode if it is implemented and bypass if it isn't. A device will shift out a 1 on the first edge of the clock if it is shifting out its ID and will shift out a 0 if it is in bypass. It is then straightforward to work out what devices are in your chain.

High end JTAG test software that does interconnect testing (which is what JTAG was originally for) does not trust the information given in the bsdl files untill they check the manufacturers ID and then the IR & DR lengths on pretty much every test they carry out.

Colin

Reply to
colin

Thanks for all the replies. I'll check into the BSDL files stuff.

slide

Reply to
slide_o_mix

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