Hi ,
I have a Virtex II Pro FPGA Board and I have a verilog HDL code, I synthesized and generated bit stream to configure the FPGA. Now unable to solve the following questions.
how can I test that code on the board ? I mean how to find verify its functionality . how can I drive the input data to the code? how can I observe the outputs for the given inputs?
Please help me in this regard.
Regards, Kishore
One possible way for you to do this is with our ChipScope Pro product. In addition to the logic analysis functions, it also has a Virtual Input/Output (VIO) core that you can add to your system for testing, control and debug. You can get a free eval license here:
Ed
snipped-for-privacy@rediffmail.com wrote:
ummm ... you serious ... what does the code do? If its completely stand alone and has no inputs or outputs ... your done! :0
usually stuff has some IO to communicate to the outside world ... these IO are what you should stimulate and monitor.
Mike
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