Hi all,
in order to comply with the timing requirements, I did explicitly replicate an output register.
-- Code Snip Below
I2 : a_reg generic map ( n => 20 ) port map ( clk => clk, din => addro_i, rst => rst, dout => addr_a_out);
I3 : a_reg generic map ( n => 20 ) port map ( clk => clk, din => addro_i, rst => rst, dout => addr_b_out);
Register instances are sourced from the very same signal. However synthesis tries to be 'clever' and removes one register instance, making it impossible to have them in the IOB section. Any advice how I can avoid this removal without going 'to-deep' and instantiate IOB-Register Primitives as 'Black-Box-Instances'.
Thank's
Markus