Release of SPARK C-to-VHDL Parallelizing High Level Synthesis tool

We are pleased to announce the release of the SPARK parallelizing high-level synthesis software tool developed at the Center for Embedded Computer Systems. SPARK takes the behavior of an application specified in C as input (with some restrictions) and produces register-transfer level (RTL) VHDL. SPARK employs several parallelizing compiler, compiler, and high-level synthesis transformations to generate a scheduled, resource bound data path along with a FSM controller. We have benchmarked SPARK on a range of multimedia and image processing designs and also a case study with an Intel design.

The download page is at:

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This page has SPARK binaries for Solaris and Linux platforms, a User Manual, and a Tutorial with a MPEG-1 player as an example.

See publications on the SPARK webpage for more details on our work:

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Sincerely

Sumit Gupta, Rajesh Gupta, Nikil Dutt, Alexandru Nicolau

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Center for Embedded Computer Systems University of California, Irvine and San Diego

************************************ Sumit Gupta Post-Doctoral Researcher Center for Embedded Computer Systems University of California, Irvine

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snipped-for-privacy@cecs.uci.edu

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