im not trying to proove a concept regarding SIMULTANIOUS SUBSTRACTION using FPGA's.
its bit more complicated and, this substraction thing (and total verilog code) is just a tool to prove it. thats why i dont bother about the best, most cost efficient way of doint it, as long as i can get results fast. and the code i mentioned is just an example. the actual matrix is maximum = 100 x 10, which allows me to do this in a real chip.
and i dont mind waiting for 100 milliseconds for the calculation, as the current calculation takes 3 seconds to complete. (this is using direct convolution, without doing FFT).
thank you.