Spartan 3E starter kit DDR SDRAM

I'm not sure what you're refering to, but David Ashley ported the OpenCore DDR SDRAM controller to the Spartan-3E500 start kit and posted it here. I only had to adjust the .ucf file a bit to get it on the Spartan-3E1600 Starter kit.

Tommy

I should probably add: More information on MIG can be found on the Memory Corner on xilinx.com:

xilinx.com:http://www.xilinx.com/products/design_resources/mem_corner/

Looks like my first message was not posted correctly: The Xilinx Memory Interface Generator (MIG) generates ready-to-use HDL for the Spartan-3E Startker Kit.

Cheers, Jaco

Aha! So two chances to get a controller. Will try this ! Thanks to both of you!

I downloaded the reference design but did only find verilog files which i cannot use. the re also ssems to be an ngc file missing, which is nowhere in the zip archiv.

Isn't there a working project for ISE 8/9 which directly compiles and produces some test ?