I can't seem to find a document that calls out the XY locations for the IDELAYCTRL. Where is this information found?
When I don't use the LOC, the report for P&R says it has used 100% of the IDELAYCTRLs. No surprize. When I look at the FPGA editor I would expext to see all of them listed but instead I only see a small portion of them. Why?
It appears that if I include an IDELAY that there is some sort of requirement on where the IDELAYCTRL is located. Currently I don't use the LOC, let the tool P&R then use the FPGA editor to see where it placed it. Then I use the LOC. What a pain. There must be a simpler way. I tell the tools where the IDELAY is to be used, why is it that the tools can't place the controller automatically?
If I select the wrong location for the IDELAYCTRL, the tool does not flag an error, the design just fails to work. You would think it would be smart enough to know.