Showing schematic changes

Hello, I am running Xilinx ISE software to do a schematic based FPGA design. Are there any tools to show the differences between 2 version of a schematic? I can diff the .sch files and get hints as to what has changed, but I was looking for a graphical tool to see the schematics.

Any suggestions?

Thanks, Ben J

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It would be easier to compare netlist output files.

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Gregory C. Read

Yes generate HDL netlists from ISE and diff those. Ben may need a script to sort the nets for large differences. This is one of the downsides of using graphical source files.

-- Mike Treseler

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Mike Treseler

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