manual interconnect changes

Jul 30, 2012 1 Replies

Hello,



I'm looking for a way to manually change interconnect switch connections.



I'm trying to simulate random bit-flips to test my solution for switch-based SEU detection. However, I'm at a loss in my search for viable options.



Altera: The chip planner is capable of ECOs, but theey only act on atoms (LEs, and LABs)



Xilinx: The FGPA editor showed a bit of promise. I can add connections inside their switchboxes, but all the work has to be done in GUI. I can't extract files to be parsed by homebrew tools.



Academic tools: I've tried VPR 6.0, but it shows nothing on switches.



Any suggestions to this predicament?


In an answer to my own question:

take a look at the xilinx XDL tool.

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