I was wondering if anyone has a reference design I could peak at. I just need something simple to demonstrate a working RocketIO with a XC2VP50 chip and the Virtex-II Pro FF1152 PROTO Board. As of right now, our design evaluates the gt_custom block and was configured using the architecture wizard. We have supplied the block with the five correct input clocks as specified (with REFCLK running and 50MHZ). We also set the parameter TXINHIBIT to high, which should cause TXP = 0 and TXN = 1, but both seem to be at ground.
Any help, suggestions or simple reference designs would be greatly appreciated.
Best Regards, T. Justin Campbell