RocketIO code example

I'm just starting out using RIO on VII Pro devices and I need some simple VHDL to get started. There are some code snippets in the RIO UG but I don't think it's complete by any means. I just need something that generates some data (probably with the Aurora primitive) so that I can test the hardware it's running on and see what's required to be implemented in user code e.g. SOP, EOP delimiter insertion, comma handling etc.

If anyone has anything that could be of use, I'd be grateful.

TIA,

Rog.

Reply to
Roger
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The Aurora "primitive"? The aurora core is not a primitive, so I am guessing you have not generated an Aurora core? When you generate the core, an example program is created, in a subdirectory named "examples". It is a very basic example, so simulate it and see what happens.

If you have not already done so, go to the Xilinx website and register for access to the Aurora core. That will get you a license to use in coregen. Once that license is installed, run coregen and go to Communications...->Serial Interfaces->Aurora 2.3 Run Customize. Do not worry about the License Status message box; it is really referring to the RocketIO core, which is a primitive (the Aurora core uses the RocketIO primitive). For the easiest example, select Desired target device VHDL or Verilog Lane width 2 Interface framing Leave the "TX only" box on, which contrary to expectations, actually generates a bidirectional link. I have no idea why. Turn off native flow control Turn off user flow control Next->

Select row 1 clock BREF_CLK - this is actually determined by what pins the RocketIO clock is connected to In Row 1, enter a 1 in the first box and leave the others as X's Generate the core. Simulate.

Reply to
Duane Clark

Duane,

Thanks for your reply. I now see the problem - I don't have CoreGen as I'm just running the WebPack version of ISE (I want to target a VP2 device which the WebPack version supports). What you've kindly described sounds just what I need so it looks like I'll have to upgrade the tools first.

Thanks,

Roger.

Reply to
Roger

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