reduced power Xilinx® Spartan-3(TM) FPGAs

I just read a press release about "power reduced" Spartan 3s. They don't give much in the way of numbers, they just say the quiescent power is reduced by *up to* 66%. The last time I checked the data sheets, there were no power figures. Anyone know what actuals might be attached to this value? Just how much quiescent power do these chips suck down? Numbers on the XC3S400 would be useful.

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Rick "rickman" Collins

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rickman
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I checked the web site and there are new numbers for the quiescent power. For the XC3S400, Vccint = 35 mA typ, Vcco = 1.5 mA typ and Vccaux = 20 mA typ.

Any plans to fill in the max values?

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Rick "rickman" Collins

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Are these the 'reduced' values, or the standard devices ?

The new Lattice devices also show typicals only, and they too are many 10's of mA. Last time I saw a leading edge MAX, it was hundreds of mA....

Sounds like they may be doing do a 'current bin', just like they do 'speed bins'. It will, of course, mean that the non reduced ones have higher typicals, as all the 'good ones' have been removed :)

-jg

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Jim Granville

These are the standard numbers that they added to the data sheet on the last go around. Not exactly bad numbers when you consider the possibly Watts these chips will consume in normal use.

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Rick "rickman" Collins

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rickman

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