reading IDCODE from parallel bus?

You didn't mention which chip you are using, but I would be surprised if this function is available. Generally JTAG can access the configuration logic of the FPGA device, but not the other way around. What are you trying to do, and why not just use the JTAG pins to do it?

actually the function is available for Xilinx slavemap, you read and write configuration frames over parallel interface. its not the same as JTAG, and you can do any JTAG commands but configuration registers are accessible. just look in xilinx documentation for more information

Antti