RAM and shift register constraints

Jun 25, 2008 4 Replies
F

hi all;



I am using HWICAP to configure certain LUTs , and as mentioned in the HWICAP data sheet that "when LUTs are configured in Shift Register Mode or as a RAM. If a LUT is modified or just read back in a column that also has a LUT RAM or LUT shift register, then the LUT or shift register will be interrupted and it will lose its state. To resolve the problem, the LUT shift registers and LUT RAMs should be placed in columns that are not read back or modified. " ,what i know form the beginning is the instance name of the LUTs , is it possible to add constrains to avoid placing these LUTs in columns that contain RAMs or Shift registers, or may be there is another solution.



thanks



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A

fmostafa,

Which family?

In V5, we have an added bit in the bitstream which prevents LUTRAM and SRL16/32 from being readback. The function performed is called GLUTMASK (not that it matters what it is called). It was added just so you do not have to deal with "knowing" which LUT are not to be disturbed (by a readback/verify).

Austin

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F

hi, thanks for your fast replay, but my family is virtex 2 pro, is there a solution based on constrains.

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F

hi, thanks for your fast replay, but my family is virtex 2 pro is there a solution

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A

fmostafa,

In Virtex 2 Pro, you would need to apply placement constraints to place the LUTRAM/SRL16 all in the same column so you could avoid that column later in a readback.

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Such constraints may make the design so it can not be routed.

It is not a simple process, and one that would require a lot of manual floor planning, and trial and error.

That is why we added the GLUTMASK feature.

Austin

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