Hi all,
I was going through the datasheet of virtex2 , in which i read that
"each 4-input function generator is programmable as a 4-input LUT, 16 bits of distributed SelectRAM memory, or a 16-bit variable- bits of distributed SelectRAM memory, or a 16-bit variable-tap shift register element."
In the diagrams given in the viretx2 datasheet for cascadable shift register , i don't seen any clock at all.
Can anybody clarify on this implementation???
Regards, Prav