question using xapp333

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I haven't looked at the XAPP333 code, but I2C slaves are much simpler than master so I generally roll my own. You don't need a microcontroller for this. My slave controller doesn't include the registers or the I/O buffers. It responds to a single 7-bit address and allows subaddressing to 256 locations similar to the operation of a 24C02 EEPROM. Rather than running asynchronously it uses a higher frequency clock to sample both SDA and SCL and debounce / deglitch them due to the slow rise times.

Module inputs are SDA and SCL, the high-frequency clock, and an 8-bit data readback bus (for I2C read). Outputs are the subaddress (8-bits), SDA drive (high when SDA should be driven low by the FPGA), read/write direction, write pulse (to load external registers), and read pulse (for read side-effects).

If you only need a single 8-bit register, the subaddress can be used as your register by disabling the auto-increment.

If you have a lot if internal registers that need readback, you can instantiate (or infer) RAM to reduce the necessary readback multiplexing. Obviously read-only registers need to be multiplexed onto the readback bus. This particular version does not support clock-stretching (in case you have slow peripherals such as external DRAM). I originally wrote the code in ABEL, but I have a Verilog version (no VHDL). Write me directly if you want a copy to see how it works. The Verilog could have been more concise but it was really a manual translation from the ABEL.