How do you download your design (in VHDL) to a Xilinx board and make it non-volitle, using the Xilinx ISE webpack software?
Here are the things I've been trying...not yet successful...
-generate PROM file
-start iMPACT
-choose Slave Serial Mode? (I'm confused here...which mode should I choose?)
If anyone could tell me the steps, I would really appreciate it. My xilinx board has a SPARTAN FPGA chip and flash memory.
Thanks!