Hi,
I'm trying to connect a MicroBlaze system build in EDK to a custom periphal core. I am using Atmark's Suzaku board [1]. It is shipped with an example project which I would like to extend via FSL. Here is what I did:
- Added two FSL cores and connected them to the MB
- Changed the ports for my periphal to "make external"
My intention is to import the EDK project into ISE later on to connect it to my system. The instantiation template looks fine but when I try to generate the netlist of the processor system I get the folllowing error message:
[snip]The FSL master and slave ports will be connected in ISE, of course. Is there any way to override the error message? Is there a better solution? EDK and ISE are the latest version with all service packs/patches applied...
Thanks in advance, cheers /Chris
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