PPC405 - FPGA interface design


I am trying to design a PHY-MAC interface on a Virtex-2 Pro FPGA. The MAC will be running on PPC 405, and the the PHY algorithms would be implemented on FPGA. I was wondering what would be the best way for desiging the interface between the two. Can we designate some sort of shared memory that can be accessed by both??

I am very new to this, so any help would be deeply appreciated.

Thanks Amit

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1 PHY *has* to be external to the FPGA before doing anything else, get some FPGA board with ethernet PHY on it, and get some EDK design with networking working, after that its easier for you to understand what you need

shared memory sure can be used, but... its the best to use existing IP cores


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