I am trying to design a PHY-MAC interface on a Virtex-2 Pro FPGA. The MAC will be running on PPC 405, and the the PHY algorithms would be implemented on FPGA. I was wondering what would be the best way for desiging the interface between the two. Can we designate some sort of shared memory that can be accessed by both??
I am very new to this, so any help would be deeply appreciated.