please help me out

hey friends , I'm trying to design an interface between a ps2 keyboard and the digilent DIO5 board which contains a Xilinx CoolRunner CPLD.

but the Xilinx synthesis tool Xst drove me crazy here are the errors I got followed by my VHDL code please help me

WARNING:Xst:1710 - FF/Latch (without init value) has a constant value of 0 in block . WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch (without init value) has a constant value of 0 in block . WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch (without init value) has a constant value of 0 in block . WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch (without init value) has a constant value of 0 in block . WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch (without init value) has a constant value of 0 in block . WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch (without init value) has a constant value of 0 in block . WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch (without init value) has a constant value of 0 in block . WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch (without init value) has a constant value of 0 in block . WARNING:Xst:1291 - FF/Latch is unconnected in block . WARNING:Xst:1291 - FF/Latch is unconnected in block . WARNING:Xst:1291 - FF/Latch is unconnected in block . WARNING:Xst:1291 - FF/Latch is unconnected in block . Optimizing unit ... =========================================================================

  • Final Report *

here is my code

--
library IEEE;
use IEEE.STD_LOGIC_1164.all;
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Reply to
Lovely Robot
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I noticed that both "P1" and "P2" processes assign a value to "ready". I'm surprised that ISE didn't complain about that. It looks like you meant process "P2" to be a counter. However, you didn't supply a clock, so "count

Reply to
Dave Pollum

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