PipelineC - C-like almost hardware description language - AWS F1 Example

Hi folks,
Here to talk about PipelineC.
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What is it?:
- C-like almost hardware description language
- A compiler that produces VHDL for specific devices/operating frequencies
I am looking for:
- anyone who wants to help me develop (Python, VHDL, C)
- suggestions on how to make PipelineC more useful/new features
- project ideas (heyo open source folks)
In the mean time, I am also here to share my most interesting example so fa
r: Using PipelineC with an AWS F1 instance.
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I have made an AMI that you can use to play around with. However, it cannot
be made public; I can only share it with specific AWS accounts, please mes
sage me if interested.
I want to share with you why I think PipelineC is particularly powerful:
First, it can mostly replace VHDL/Verilog for describing low level, clock b
y clock, hardware control logic. Consider the following generic VHDL:
-- Combinatorial logic with a storage register
signal the_reg : some_type_t;
signal the_wire : some_type_t;
process(input, the_reg) is -- inputs sync to clk
variable input_variable: some_type_t;
variable the_reg_variable : some_type_t;
begin
input_variable := input;
the_reg_variable := the_reg;
... Do work with 'input_variable', 'the_reg_variable'
and other variables, functions, etc and it kinda looks like C ...
the_wire
Reply to
Julian Kemmerer
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With anything like this you have 30s to convince me to spend some of my remaining life looking at it rather than something else. Hence I want to see: - what benefit would it give me, and how - what won't it do for me (it isn't a panacea) - what do I have to do to use it (scope of work) - what don't I have to do if I use it (I'm lazy) - how it fits into the well-documented toolchains that many people use (since it doesn't do everything)
If I see the negatives, I'm more likely to believe the claimed positives.
Reply to
Tom Gardner
Give a quick go:
what benefit would it give me, and how: Feels like RTL when doing clock by clock logic, and can auto pipeline logic otherwise.
what won't it do for me (it isn't a panacea): Not a full RTL replacement yet. Would love help to get it there.
what do I have to do to use it (scope of work) Write C-looking code, tool generates VHDL that can dropped into any existing project. Mostly a matter of time to run the tool in addition to already long builds.
what don't I have to do if I use it (I'm lazy): Dont have to manually pipeline all you logic to specific devices / operating frequencies. Can share 'cross-platform' code.
how it fits into the well-documented toolchains: Outputs VHDL. And C-looking code can be used with gcc for debug/modeling.
Thanks eh!
Reply to
Julian Kemmerer

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