PCI-Core

Hello to all,

I would like to integrate a buyied (target-)pci-core into an xilinx-spartan3 fpga (xc3s200-pq208-4). The core is an *.edf. The core has been originally designed for a virtex-system as you can see in the ending part of the *.edf:

--
  (design (rename pci_core_32target "pci_32_target") (cellRef
pci_core_32target (libraryRef work))
	(property PART (string "xc2v4000bf957-6") (owner "Xilinx"))
Reply to
Thomas Bartzick
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Do you have try on an DESKTOP PCI SLOT, or on an custom PCI motherbaord.

If DESKTOP PCI SLOT, your sp3 is 3.3V tolerant only, and the major part of the desktop are 5V IO Tolerant. So, you are driving SP3 IO with 5V :-) . The way is to use sp2 or drivers between sp3 and pci finger.

Regards, Laurent Gauch

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