Original (5V) Xilinx Spartan ?

Hi Jon - of course somebody from Xilinx can confirm this. However, I know
for sure that it is well in production and still shipping volumes to many
customers.

--Neeraj

Jon,

Still in production, still shipping to customers.

Contact your local sales rep to talk about stocking and pricing.  The
fact that the newer parts cost a lot less is because they are smaller
die for the same functionality.  If you think about it, the $ per FPGA
gate has been dropping pretty drastically now for many years.  In
Spartan 3, we are now down to ~100 uCents per gate range.  The XCS30 can
no hope to compete for this being in such an old technology.  Seven
years ago, ~$40 for 30K "gates" was a great price....

Austin

Jon Elson wrote:

Oh, I understand this!  For electrical reasons, I felt that I needed 5 V
compatibility,
so designed it with the 5V parts.


Well, the Xilinx web pages show no mention of Spartan without the XL,
II, etc.
and a search of XCS10 comes up with nothing.  Digi-Key used to stock the
XCS10
through XCS40 or so, and other distributors also had them in their
on-line catalogs.
Now, when I search at various distributors, I either get no match or
"special order".
I'll have to talk to some people.  Also, who is "MuxLab, Inc."?  They
are apparently
supplying something to Newark with the part number XCS10-3PC84C, and call it
a CMOS-CPLD-xxx or something like that.  Is that a real second source?

Or, is MuxLab just emptying out their warehouse full of old parts?

Thanks,

Jon

The Xilinx web pages typically combine 5V Spartan with the 3.3V Spartan-XL and
refer to the "Spartan/XL" together since they have the same basic architecture.
The data sheet is also a combined document.  Let me know what search options you
used that came up empty for the XCS10.  According to muxlab.com MuxLab is "is a
leading designer of value-added connectivity hardware allowing audio-video and
data equipment to be connected via cost-effective copper twisted pair."  No
relation to Xilinx and not a second source.  I don't see them mentioned on the
Newark web site.

Jon Elson wrote:

Austin,

I'm not tryin to quibble, I just want to understand what your dollar (or
cents) figure means.  At 0.0001 cents per gate, I get $0.40 for the
XC3S400.  That is a lot less than the quote I got a few weeks ago.  Were
you counting "real" gates instead of "user" gates?  

Rick,

I was counting what we count as "gates".  And the number was for the largest
part.

Forget it.  The price quote is where the rubber hits the road.  Sorry I
confused everyone.  But plotting the price per gate is an interesting academic
exercise that does show a huge price per gate reduction in the last 5 years.

Austin

rickman wrote:

Here are my 2 cents worth, the way I explained it at FPL2003 in Europe
last week:

When I joined Xilinx in 1988, we charged about one dollar per
flip-flop/LUT combination.
Today that price in Virtex is about one cent, and in 2004 in Spartan3 in
high volume it is heading towards  0.2 cents.
Size, package, speed-grade and purchase volume do of course change these
numbers considerably...

Peter Alfke, just back from Lisbon.
I gladly missed all the discussions on how to "eliminate" metastability.
What a waste of engineering effort and internet bandwidth...
===================
Austin Lesea wrote:

Peter,

I would like to know how you came to this number for the Spartan3
parts.  If I use this number for the XC3S400, I get 7168 x $0.002 =
$14.336.  For the XC3S5000 I get 66,560 x $.002 = $133.12.  Are these
realistic prices at all?  What assumptions did you use?  

I understand that your .2 cents figure is only a rough rule of thumb,
but to be at all useful an understanding of the basis is needed.  

BTW, the discussion on metastability may appear to be a waste of
"bandwidth", but it is an important discussion since most people seem to
learn about it here rather than in school or elsewhere.  I know there
were a great many things that were never even mentioned in school that
turned out to be essential to designing good circuits in the "real
world".  

I agree.

Luiz Carlos

I checked with  Spartan marketing  ( I will never quote specific prices
without their blessing ), and they confirmed my numbers:

The price per LUT/flip-flop is not constant.
At the small end, the package cost drives it up,
 and at the high end, it is the yield loss that drives it up.

The sweet spot is around the 3S1000 with 15 360 LUTs/FFs.
It will sell in late 2004, slowest speed grade in large quantities for
$20.
That's 0.13 cents per LUT/FF.

The number for the 2S400 is $10 for 3840 LUTs/FFs = 0.26 cents per LUT
For the top-end 3S5000 it is $150 for 66 560 LUTs/FFs = 0.23 cents per LUT.

That means I was pretty close with my 0.2 cents.

Peter Alfke

===================================
rickman wrote:

I'm assuming XC3S1000-4FG676C will cost $85.65 in 5000 quantities.

(This was a recent Xilinx quote.)

I also assume that the $20 figure is for seriously large quanities,
but I'm still surprised there's that much of a difference.

I recommend that you find an alternative and go back to your supplier
for a better price.  I have not gotten a quote for this part, but based
on my experience you should be able to do better than $40 at your volume
and package.  You might be able to get below $30.  

Peter, se você quiser, nós podemos rediscutir o assunto. Que tal
começarmos pelas figuras enviadas pelo Philip?

Luiz Carlos

Le mot juste...

So what is wrong with telling folks that fixing metastability is a myth
and waste of time?

It is similar to the patent office not considering perpetual motion
machines.

The basic physics of it is well understood, and that is that.....

Austin

Tim wrote:

Whoops.  Just playing with words.  I have no real idea what
Luiz said.  Faux pas, hein?  Nil desperandum.  C'est la vie.
Che sera sera.  (quoted from an old Stoppard play)

I see why metastability can't be detected or corrected within the
digital domain, but I still don't quite understand why metasability
can't be detected in the ANALOG domain and then corrected after a
FIXED (rather than exponentially decaying probability) time-window
after the clock cycle to be forced into one of the stable states.

Someone care to explain in simple words for an idiot like me?

[Apologies if everybody was hoping this horse was dead.]

Suppose you have an analog detector.  It's output is 0, 1, or
maybe when in transition.  How do you turn that into a clean
digital signal?  Doing that is the same as solving the metastability
problem.

A digital logic gate when operating near threshold is roughly
linear.  It's trying to decide if the input is above or below
the threshold.  A gate is really an analog circuit if you look
hard enough, just saturated most of the time.  But the times we
are interested in are when it's not saturated.

Nothing.


 Perhaps not a ideal choice of words :)

 The practical reality and impact of metastability are (hopefully)
well understood.
 As to basic physics, or even models, well - that seemed to be pretty
much up in the air :)

 From all of this, I think there emerges a case for
a 'Metastable Block' or cell, which can be used in the tools,
and that the tools can model, and sdvise-the-use-of.

 This could have variants of Fall/Rise edge dual Flip Flips, or
a Latch+FF ( effectively the same thing, but may be a better hardware
fit on some target devices )  
 ( Tsu = half clock),
or
Rise/Rise dual Flip Flop
( Tsu = full clock, but longer metastable settling time )

 This would help those who have yet to encounter WHY they
need to address metastable events.

- jg