not inferred RAM, on QII

Apr 21, 2008 7 Replies

Hi,



On some pretty obvious piece of VHDL (below) QuartusII does not inferred any RAM !!!!!! (whatever "width" value is...)



Any help how to convince QII to use RAM and not LEs ??? (all ram options are set to ON... and I've seen it working well on other occasions so what Is wrong here ?)



many tks.



lc.


(I used QII7.0web ed.)



--snip--



type k_ram_type is array (0 to (2**width)-1) of std_logic_vector(17 downto 0); shared variable k_ram: k_ram_type;



begin



process(a_clk) begin if rising_edge(a_clk) then if en_A='1' then if wr_en_A='1' then data_A_out


Are you sure that Quartus supports shared variables for RAM insertion ?

Not sure, but if I use a regular variable instead the problem remains the same. No RAM inserted, only LE's

lc

snipped-for-privacy@web.de wrote:

You didn't quite follow the template for inferring memory.

_in;

Remove the "if en_A=3D'1' then " and the corresponding "end if". You can't have a clock enable on the 'read' side. Refer back to the Quartus documentation for the supported templates that infer memory.

Kevin Jennings

Indeed some deviation from the recommended. corrected now.

Main culprit was however QII requires a "signal" "variables" won't infer memory !

few more tweaks and is working. tks.

lc

KJ wrote:

Apparently no shared variables and not also local variables... No variables of any kind seem to be supported for ram insertion.

works fine with a "signal"

tks. lc.

snipped-for-privacy@web.de wrote:

Not true.

formatting link

Sry, Should have written "shared variables" won't infer memory.

lc

Mike Treseler wrote:

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