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No respect of exernal pins [xilinx]

Hi all!

I encounter a strange problem. I wrote a macro and tried to use it in a design. The problem is, the xilinx tools modify the external pins of my macro. Indeed, my macro is build of LUTs and then, I want to use partial reconfiguration to change their equations. The problem is that the tools modify the entries of these LUTs and my equations are not ok any more.

Someone has ever experienced such a problem ? Does it exist any option for tools to force them to respect the external pins ?

Grégory

Reply to
Grégory Mermoud
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Gregory, tis is not a direct answer to your question, but: Have you looked at SRL16 to change the content of your LUT(s)? I think that is much more convenient than partial configuration (for your particular purpose). Peter Alfke

Reply to
Peter Alfke

No, what is it ?

Reply to
Grégory Mermoud

If you declare the 4-input LUT an SRL16, it becomes a 16-bit shift register. You shift in the 16 bits, and can then use it as the normal LUT that implements the logic you need. Remember that the LUT really is defined by 16 bits stored in 16 latches. And Xilinx was smart enough to interconnect the 16 latches in such a way that they can function as a 16-bit shift register. The explanation how a latch can be transformed into a master-slave register would go too far here. Just trust me, it works, and is one of the big advantages Xilinx has over its competitor... Peter Alfke

Reply to
Peter Alfke

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