Hello, I am starting with fpga and I have some questions,
My first question is do I need a clock input? I want to build the xilinx cpld. I found a tutorial on the web where a clock can be generate like this:
always begin #5 clk = ~clk; end
Will this really work? what will be the frequency?
Where do I find the schematic diagram of the xilinx xc9536 which indicate power/gnd, io pins, and jtag pins?
Karren.
Hi,
Unless you have purely combinational logic, yes.
Only in simulation. On a real board you will need a clock module.
Depends on the `timescale directive.
Cheers, Jon
Hi Jon, thanks for your reply, I had a look in xilinx.com but could not find which datasheet carrys the schematic of the package, I know it's a PLCC configuration, but need to know which pins are which if you know what I mean. Any suggestions?
Hi Karen,
Following on from the previous post - the verilog code you've written will only work during simulation. The reason being is that CPLD's have no real way of determining time periods i.e. your code details a time peiod of 5, at least without some oscillator module such as IQXO-36C-16.384MHz from C-MAC connected to one of the GCLK pins.
As stated in the previous post you can find the pin out of the device from the Xilinx website, but I've got the link for the device you've mentioned;
The link will open a pdf and on sheet 6 the power and clock pins are detailed depending upon the package you're after.
Hope this helps
Chris
Karen Halgren wrote:
Hi Karen, I've a suggestion, if you're gonna get anywhere with FPGAs, you wanna learn how to use a search engine. This one seems popular:-
In shorthand, Google this:-
package site:xilinx.com
HTH, Syms.
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