87C52 & 87C51 core

A strange question.

Is it the missing 'C' or the missing '7' that is bothering you ?

'C' = CMOS tag, and even tho these cores are called 8051 and 8052, they are not NMOS ROM cores, but named thus to show 128 and 256 byte models. ( and likely the Timer2 )

'7' = OTP, which covers the CODE storage. Most FPGA cores handle the Code separately, either off-chip, or into Block RAM. Typically here, the HEX file is morphed into the bitstream, and downloaded, and the FPGA has BRAM holding correct CODE when it comes out of configure.

Summary: Those cores will behave like 87C51 and 87C52 [except you will be able to change the code! :)]

-jg

The 87C51 and 87C52 are just the CMOS versions of the 8051 and 8052 with onboard EPROM program memory. You should be able to use an 8051 or 8052 CPU core, and use a blockram for the program memory.

I was interested in the EPROM program memory feature of the 87C52's. If I can use the BRAM's in its place, then I think I can go ahead with one of the already available cores. Thanks for the help guys.

Difficult to use EPROM program memory in an FPGA that doesn't contain any EPROM. If there's some reason that you really need it to be an EPROM-like technology, I think there are flash-based FPGAs from Lattice, and flash memory is functionally fairly similar to EPROM (aside from not using UV to erase).

But if all you need is a basically non-volatile program store that is only infrequently changed, BRAMs work fine as ROMs. They get loaded from the config memory, so when you do want to change the firmware you just rewrite the config memory.

Best regards, Eric

the flash-based FPGAs from Lattice are called the MachXO (smaller densities 256 LUT - 2280 LUT) and LatticeXP (medium densities 3K LUT-

Regards, Bart Borosky, Lattice

"bart" schrieb im Newsbeitrag news: snipped-for-privacy@y43g2000cwc.googlegroups.com...

Antti