FPGA Recommendation

Hi,

Could you give some FPGA recommendations? Requirements ...

About 2000 cells Free design software with quick learning curve, data paths Peripheral voltages compatible with a standard logic family and RAMs Easy programming (ICSP) or self loading from EEPROM Minimal "gotchas" and quirks

All the families I've looked at have power consumption and prices well within my needs.

This is for a PDP-1 CPU.

Thanks, Gary

Reply to
Abby Brown
Loading thread data ...

I've used Altera parts - Max II or Cyclone II, depending on the resources required.

Altera's free Quartus Web Edition development software is quite easy to use, and allows you to use any combination of schematic diagrams or HDL to define your design. (you can even use 7400-like symbols on a schematic.)

--
Peter Bennett, VE7CEI  
peterbb4 (at) interchange.ubc.ca  
GPS and NMEA info: http://vancouver-webpages.com/peter
Vancouver Power Squadron: http://vancouver.powersquadron.ca
Reply to
Peter Bennett

IMHO all FPGAs have gotchas and quirks epecially if you push pin placement and operating frequencies to the max. I'd choose the older Spartan3 series from Xilinx. Pretty fast and every pin can used as an in/out.

--
Failure does not prove something is impossible, failure simply
indicates you are not using the right tools...
nico@nctdevpuntnl (punt=.)
--------------------------------------------------------------
Reply to
Nico Coesel

So far, I've found the Altera MAX-II CPLDs to be pretty good. They're a little different than a true FPGA but the user really doesn't notice the difference so much. One of the advantages of the MAX-II series is that the config flash is built in. Max-IIs only need a 3.3V supply, too (internal LDO). Cheap too.

Reply to
krw

Yup. I like the Max2 CPLD's too. I especially like their embedded memory, which has plenty of space to store your data. When you need to program RF PLL synthesizer chips and such using the CPLD sequencer, you want to store the programming words in the memory instead of declaring them as hard-coded constants in your Verilog/VHDL code. That saves a lot of main logic gates.

One thing, though, I am concerned about the MAX2 CPLD products is the limited programming cycles. They only guarantee 100 times of erase/programming cycles. I think I have done more than that or very close to that number to one of my devices. So far I don't see any problems.

I'm simply curious about why they had to specify this 100 times limitation for this device family. Usually, devices like Nor flashes, NAND flashes, CPLD's, FPGA's with internal config memories, and CPU with internal flash memories allow 10,000 times or so of erasure/programming cycles.

Altera must have employed especially hottie electron girls on thier MAX2 silicon so they blow quicker.

Atsunori

Reply to
Atsunori Tamagawa

There usually is a relation between the number of programming cycles and the data retention time. You can program a flash many times, but the retention time will get shorter (no longer guaranteed).

--
Failure does not prove something is impossible, failure simply
indicates you are not using the right tools...
nico@nctdevpuntnl (punt=.)
--------------------------------------------------------------
Reply to
Nico Coesel

ElectronDepot website is not affiliated with any of the manufacturers or service providers discussed here. All logos and trade names are the property of their respective owners.