Multidimensional port.

My understanding is "no." Consider System Verilog if you "have" to use multi-dimensional input/output ports. The method Verilog designers often use is to make a multi-dimensional port into a simple vector, pass tha vector, then change the vector back to the multi-dimensional port.

Thanks john for your replay... i will follow that way. I am not familier with system verilog. What is the difference with normal verilog. Can i use it on the tool chain (model sim xilinx etc) and get the same output.

The difference Verilog and System Verilog is that your toolset (XST) doesn't support System Verilog :(

You could try VHDL; multidimensional arrays have been supported on ports for synthesis for a long time. Only kidding. John's suggestion of a 1 dimensional port is probably the best for you.

Regards, Allan