Hello,
I am using ModelSim SE Plus 5.7d. VHDL code compiles and loads fine. However, if I use the "add wave *" command, ModelSim smply quits, regardless of what I put in the "*" field. Invoking it from FpgaAdvantage 6.1 shows me the following:
Performing hierarchical generation through components... Checking which design units need saving Incrementally generating HDL...
. . . Generation completed successfully.
-------------------------------------------------------- Comparing HDL files with compiled files ...
Current working directory is C:/FPGAdv61/Hds/bin
Executing data preparation plug-in for ModelSim 5.5 - 5.7
Nothing to compile - design is up to date Data preparation step completed, check transcript...
--------------------------------------------------------------------------------- Reading C:/FPGAdv61/Modeltech/tcl/vsim/pref.tcl Reading C:/FPGAdv61/Hds/resources/downstream/modelsim/hdsInit.tc_ Connected to HDS # Attempting stack trace sig 11 # Signal caught: signo [11] # vsim_stacktrace.vstf written # Current time Fri Jan 20 19:54:08 2006 # ModelSim Stack Trace # Program = vsim # Id = "5.7d" # Version = "2003.05" # Date = "May 10 2003" # Platform = win32 # 0 0x00511e4f: ' + 0x6aaef' # 1 0x00511e99: ' + 0x6ab39'
# Corrupt Call Stack
** Fatal: (SIGSEGV) Bad pointer access. Closing vsim. ** Fatal: vsim is exiting with code 211. (Exit codes are defined in the ModelSim messages appendix of the ModelSim User's Manual.)How can I solve this?
Regards,
JaaC