Looking for 64 bit IEEE802.3 Verilog code or tips for code

Hi I am looking for verilog code for a 64 bit wide datapath. I used the function generated by EASICS but did not get the correct results.

If someone could post the code on how to use the EASICS function or give me the psedo code or just the steps I need to perform to make it work, I would really appreciate it.

I would also appreciate a sample good packet with the correct CRC appended to it for verifying the code.

thanks

Vikram

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Vik
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Maybe the foillowing from the archive will help:

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Philip Freid>Hi

Philip Freidin Fliptronics

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Philip Freidin

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