Hi
we are looking for one serious beta tester for our PLD2HDL conversion tool (Xilinx Coolrunner XPLA3 support). Please inquire in private. The current version of the tool seems to be quite accurate, as example the synthesis of the vhdl converted from Xilinx Cable IV readback (XCR3384) reports 3 UCT, 1 GCK, 39 I/O's, 117 FF's and 230 MC useage what to our knowledge is pretty accurate. We run of course our own test suite on the tool as well, but 3rd party testing can always help to find more bugs and/or issues than inhouse testing.
Antti