Hello all
I am trying to implement the following logic in a xilinx XCS05xl FPGA.
I have a 15 bit binary counter. I need to store its count value on the occurrence of an event. Some time later I need to shift the stored counter value out of the FPGA in a serial fashion under the control of a clock.
What I currently have is:
----------------------------------------------------------------------- input clear; reg clear;
input ACB_Decade_Count_Enable;
input ACB_Read_Trigger_Address_Clk;
output ACB_Trigger_Address_Output; reg ACB_Trigger_Address_Output;
reg [14:0] Store_Trigger_Acquisition_Count; // Storage for counter count.
// Store the count value when ACB_Decade_Count_Enable is high. always @ (ACB_Decade_Count_Enable) begin if(ACB_Decade_Count_Enable) // event happened input is high. Store_Trigger_Acquisition_Count