ISE 7.1 and DCM clkfx

I just upgraded to ISE 7.1.03i. My old 6.3i design used some DCMs in a "not so legal" fashion, where I had CLKFX_DIVIDE = 33, and CLKFX_MULTIPLY =

  1. My old version of ISE (6.3i) would actually accept the divide value and produce a working bit stream. 7.1 on the other hand actually complains during the mapping phase. Is there a way to disable the checking of this and force it to accept those values?


-- Matt

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Reply to
Matthew Plante
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Howdy Matthew,

Assuming 31/32 isn't an option instead, and assuming this just for lab use, and assuming you can't go back to using 6.3i (are you noticing any better results with 7.1i?), you might open a webcase with Xilinx and see if they'll tell you the hidden command line switch or environment variable to bypass the CLKFX range checking, or if they have some other way that they might let you do it.

If you manage to get past MAP (and PAR), you may have to disable the DRC checking in bitgen as well - just have to try it and see.

Good luck,


Reply to
Marc Randolph

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