ISE 5.2 constraint file problem

Sep 03, 2003 4 Replies

Hi, I have a vhdl project and I used a UCF file to assign the package pin to each port in the design. This works fine. However, if I change my vhdl code (let's say I remove an output port), I always get the following error when I try to run the UCF editor: ERROR:NgdBuild:756 - Line 3 in 'constraints.ucf': Could not find net(s) 'outputA' in the design. To suppress this error specify the correct net name or remove the constraint.



It seems like the UCF doesn't update itself with the new design. I tried everything and I always have to start with a new UCF each time. The removed port doesn't exist in the Edit constraints (TEXT) because I didn't add any constraint to it. I really don't see how to do it. Thanks David


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I use Aldec for a front end to Xilinx. This UCF editor is a major problem for me always. The two don't communicate well with regards to the ucf, and any changes that it may have. You can get into an endless loop where one wants the other to fix it, but it can't because he wants him to fix it etc.. "You must run translate after modifying the ucf". So try and run translate and it says the ucf has an error because you added things etc. Very frustrating.

Why don't you just tell it to ignore these?

-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Martin Euredjian

To send private email:

0_0_0_0 snipped-for-privacy@pacbell.net where "0_0_0_0_" = "martineu"

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Hallo David,

i also had this problem. My workaround is to delete the removed ports manually from the ucf-file by using "Edit Constaints(Text)" from theProcesses-Window. This works fine and is fast.

best regards

Thomas Oehme

"David Lamb" schrieb im Newsbeitrag news:bj547c$6pr$ snipped-for-privacy@home.itg.ti.com...

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