For whatever reason, I need to be able to initialize the M-RAMs in Altera chips, and I need to do this in a timing simulation, for which I use Modelsim.
So I've hacked the stratix_atoms simulation libraries to initialize them, and that works fine. I can start a simulation, look in those memories and everything they have is correct, but now the simulation is incorrect. Anyone know why this might be? Are the columns of the RAM permuted for timing reasons, is it endianness, or anything else?
I need to do this with a lot of designs, so setting break points and using the Update Embedded Memories in Quartus' simulator is annoying. Any other suggestions?