i486 FPGA replacement

Hi all!

We've some custom boards with i486 processor, some RAM, some dual port ram and other stuff (interrupt controller, buffers, I/O transceiver and so on). I'm investigating the opportunity to replace all of those discrete ICs with soft/hard IP (cycle accurate), and syntesize the system in an FPGA (Altera or Xilinx).

Actually I don't care about costs and efforts that are involved in this approach. The goal is to get a replacement for that processor without re-writing the operating system and any other kernel routines.

Any suggestions?

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snipped-for-privacy@virgilio.it schrieb:

there isnt any 486 class ips asfaik, some 86 maybe 286 cores do exist but if you need 486 cycle accurate its not so easy task


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So you want to mimic the i486 on an FPGA, with accurate cycle timings? This sounds like a *huge* project if you can't just buy the IP off the shelf from Intel. How fast is the i486?

I think you'd have no problem with replacing all the support IO with an fpga. The problem is the i486 itself. I'm assuming this is because Intel has end-of-lifed the i486 or something.

Can't you go with a newer cpu that is i486 compatible? Same as the PC industry, it's all backwards compatible. Doesn't even have to be made by Intel. AMD, VIA, Transmeta, National, etc.

If you can make minor tweaks to the OS your life will get very much easier. Once you get the cpu in a stable state, everything runs the same. Even if you don't have source for the OS it would be easier reverse engineering the binary, modifying the initialization of the CPU, and running with that, than trying to make a perfect i486 clone somehow. Software is always easier to work with than hardware.

That's about all I can come up with. Need more input.


David Ashley                http://www.xdr.com/dash
Embedded linux, device drivers, system architecture
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David Ashley

As David suggested, why not use a Pentium off the shelf, say a PC104 board with Via or Transmeta? chip for low power or Intel for medium performance, will run way faster than any FPGA 486 ever could and you might even find a board thats alot like what you already have in compact form. I recall PC104 has atleast 100 vendors and these boards will be around for awhile. You may even find some with your fav FPGA vendor onboard too or you can just do a doughter board for ISA or PCI to finish things up. There may be some PC104 FPGA development boards around too.

If it seems cost is no object as in say a mil boondoggle then these PC104 boards are pretty much ready to go.

I suspect that if a FPGA 486 could be designed for 32b RISC clean code only, it wouldn't be such a big deal to get code running on it. It wouldn't likely ever be cycle accurate due to caches but abandoning the old segment stuff and arcane 8,16 bit codes would reduce the task possibly an order of magnitude since the main core is pretty RISC with microcode for everything else. Can't say if your code is dependant on those rarely used codes though.

John Jakson

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Is it safe to assume that you don't have (and can't buy) the source code to the OS & application?

Trying to design a 486 from scratch and match the exact performance of an existing chip is something I don't think even Intel would take on at this point. It can't be the best thing to do.

If you don't have source, but if you have rights to disassemble the code, you could fairly easily recreate 'assembly' source. This is something that you can 'farm-out' to someone in India or many other places and get done fairly easily. You basically do a flow control analysis on it and as long as there aren't too many indirect jumps you get a good representation of code. Then you back-annotate it so you can find the important routines. This is the first step in moving it to a Pentium processor that you lower the 'effective' clock rate to get performance something close to what you are running on the 486.

good luck


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As I think everyone has said this isn't a simple task. We do a lot of obsolete component replacements in FPGA and CPLD and mainly they are massively less complicated that a 486. They take a lot of time to get anything like an exact match and even then you get other factors like power consumption is much less, or more, that causes secondary issues. I/O timing also tends to be hard to replicate exactly even if you have a 500 MHz clock that will allow placing of edges to a 1 ns resolution when using both edges of the clock.

On this level of complexity you would be talking a very expensive, long timescale and possibly not achieveable project. I would say you would be better reverse engineering at a higher level say the I/O of your board.

John Adair Enterpo> Hi all!

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John Adair

snipped-for-privacy@virgilio.it ha scritto:

Thank you all for your extensive explanations and suggestions! The i486 constraint comes from the main specification to not modify any part of the operating system. I've the complete source code (written many years ago in PL/M386), but we decided that porting to another platform or re-validate another core (pentium, transmeta, via, geode ...) is not possible... Maybe we'd better reconsider the specifications!

I think we'll use FPGA for glue logic, ram interfacing and dual port ram emulation, and leave the processor as an off the shelf device...

Regards, Eugenio.

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I am not sure what you mean but a Pentium or even the new PIV can run old programs well. i486 is backward compatible means that new processors will support older chips as well. Unless you want to just change the chip and KEEP rest of the remaining circuit.

In that case I suggest you decouple the mainboard from the system and replace it with a new board. There are still boards running i486 for SBC..


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