Hi all,
in other words, is there an easy way to avoid FPGA attempt to configure?
thanks florent
Hi all,
in other words, is there an easy way to avoid FPGA attempt to configure?
thanks florent
What do you mean?
if you are talking about preventing the board to configure the FPGA on power-up, you can remove the jumper JP1 from the board (or put it into disable flash read position)
or from impact, you can erase the PROM
tejo
snipped-for-privacy@gmail.com wrote:
hi
how to perform a boundary scan test after the FPGA is configured or in other words how do i know that the FPGA is configured properly
Thanks and Regards Lokesh BODDU
Well, the simplest way to verify that the Spartan device was configured properly is to monitor the DONE pin. Is it high? You can also generate a mask file and do a verify after configuration. There are other methods such as readback, but lets start with some basics for now. Check out the iMPACT Users Guide for more details or the Spartan-3 Configurations Users Guide:
-David
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