The code for MicroBlaze RISC controller in the the MicroBlaze Master System is stored in the Platform Flash memory device, the same used to configure the FPGA. Check to see that jumper JP1 is set correctly. The JP1 jumper is in the upper right corner of the board. Check that the jumper connects the two left-most pins (positioned away from the right edge of the board). There is more on page 39 of the manual, also available online at the following link.
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When set in the position, the FPGA boots from the Platform Flash, then an application within the FPGA continues reading additional information from the serial Platform Flash. The MicroBlaze Master System converts the serial data to MicroBlaze instructions and saves them in the on-board SRAM and executes from there.
CAVEAT: This is just a hunch, based on the information provided.
--------------------------------- Steven K. Knapp Applications Manager, Xilinx Inc. General Products Division Spartan-3/II/IIE FPGAs
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