How to get ISE to create a _bd.bmm file for BRAM initialization

I have an XPS/ISE project for a Xilinx Virtex II Pro. The XPS design is called PPC_DDR and is instantiated on a top level schematic in ISE (called JTT_DDR). I am unable to get the .bit file to be updated with the code from the XPS application that is marked for BRAM initialization. I cannot get ISE to create an _bd.bmm file with placement information in it.

XPS created two files: PPC_DDR.bmm and PPC_DDR_stub.bmm, both in JTT_DDR\PPC_DDR\implementation\. ISE created a file called edkBmmFile.bmm in the JTT_DDR directory. edkBmmFile.bmm and PPC_DDR_stub.bmm are identical. I have tried adding either of these files to the ISE project and get the same result in either case. The error message listed below is reported and a file called XpsTempBmm.bmm is created. The XpsTempBmm.bmm file contains only the line "#include edkBmmFile.bmm" *TWICE*. which seems to be the error and explain the error message below.

How am I supposed to get ISE to produced the "placed" version of the bmm file??

Error Message:

--------------------------------------- NGDBUILD done.

ERROR:Data2MEM:34 - Duplicate ADDRESS_SPACE or ADDRESS_MAP name usage 'plb_bram_if_cntlr_1_bram'. Line #4, File "edkBmmFile.bmm". ADDRESS_BLOCK plb_bram_if_cntlr_1_bram RAMB16 [0xffffc000:0xffffffff] ^ Line #3, File "XpsTempBmm.bmm".

FATAL:Data2MEM:43 - Release of unknown memory pointer, 0x04A85520. Source file "../s/D2BUtil_Data2Bram_impl.c", line number 96.

Reply to
Steve
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The "placed" version is actually produced by bitgen, i.e. you need to run the Generate Programming File process if you use GUI...

/Mikhail

Reply to
MM

I have never been using the GUI interface, so I can't help you with that.

But for your first test, I would suggest that you launched the different commands by hand. For instance, try to launch the ngdbuild command with the name of your bmm file directly (PPC_DDR_stub.bmm):

the command line should be : ngdbuild -p -uc .ucf -bm .bmm

the device name being for instance "-p xc2vp70ff1704-6" if you are using a V2P70 with package FF1704 and speed 6.

You then launch the map, the par, the trce and the bitgen with the options you want.

Bitgen should create the _bd.bmm file that you need to use in the data2mem command to put the soft (.elf file) in the BRAMs. Here is the command you should be using (if your soft file is called executable.elf, and the output bit file your want to generate is called download.bit):

data2mem -bm _bd.bmm -bt .bit -bd executable.elf tag plb_bram_if_cntlr_1_bram -o b download.bit

A .bmm file looks like this: ADDRESS_BLOCK plb_bram_if_cntlr_1_bram RAMB16 [0xfffe0000:0xffffffff] BUS_BLOCK plb_bram_if_cntlr_1_bram/plb_bram_if_cntlr_1_bram/ramb16_s1_s1_0 [63:63] ; plb_bram_if_cntlr_1_bram/plb_bram_if_cntlr_1_bram/ramb16_s1_s1_1 [62:62] ; ... END_BUS_BLOCK; END_ADDRESS_BLOCK;

And the generated _bd.bmm file should look like this (this is the same, but placed):

ADDRESS_SPACE plb_bram_if_cntlr_1_bram RAMB16 [0xFFFE0000:0xFFFFFFFF] BUS_BLOCK

plb_bram_if_cntlr_1_bram/plb_bram_if_cntlr_1_bram/ramb16_s1_s1_0 [63:63] PLACED = X1Y17;

plb_bram_if_cntlr_1_bram/plb_bram_if_cntlr_1_bram/ramb16_s1_s1_1 [62:62] PLACED = X1Y18; ... END_BUS_BLOCK; END_ADDRESS_SPACE;

Hope this helps.

Reply to
Arnaud
[ much edited out to add one additional point...]

PLACED = X1Y17;

PLACED = X1Y18;

There used (in EDK 7.1) to be one extra step, not well handled by the tools, when generating a PPC system in EDK, then incorporating it into a top level design in ISE. I don't know if this still applies in ISE/EDK 8.*.

EDK will generate the above ".bmm" file as shown.

However the PPC system is incorporated into ISE design as one component in a larger system, for example as an instance labelled "myppc_system". (assuming it is incorporated into the top level ISE design; if it is part of block1, the instance label will be "block1/myppc_system")

Thus the BRAMs are known by a different name in the top level design; plb_bram_if_cntlr_1_bram/plb_bram_if_cntlr_1_bram/ramb16_s1_s1_0 becomes myppc_system/plb_bram_if_cntlr_1_bram/plb_bram_if_cntlr_1_bram/ramb16_s1_s1_0 and data2mem cannot find them in the BMM file.

If this is the case in your example, you can edit the ".bmm" file in a text editor, and prepend "myppc_system/" (or "block1/myppc_system/") to each line in the BUS BLOCK. I only needed to do this edit once, when I first incorporated the PPC system into the top level design.

After this, the tools find the BRAM instances, and bitgen creates the correct "_bd.bmm" file, which can be inspected to see the PLACED constraints as above.

Hope this helps,

- Brian

Reply to
Brian Drummond

Replying (very late) in case this helps anyone else:

My problem was ultimately solved by replacing the top level schematic with VHDL. Xilinx support recommended this. There was some discussion of upper case/lower case mismatches in the ED kmodule name (ppc_ddr in my case), but changing that did not help. Problem went away in an all- VHDL situation.

Thanks for the suggestions in the other replies...

Reply to
Steve

I thought the solution to this problem might be useful for others.

I've just had to fight this problem again after installing ISE9.1 and trying to use it to to compile a project created in 8.2. It is known that the ISE and EDK tools have to be of the same revision for the integration to work properly. In this case I had to delete the xmp file from the project tree and rely on the ability of ISE to pick up previously generated EDK netlist files during build time. That all worked fine, but no EdkBmmFile_bd.bmm file was generated by the bitgen in the end. So, the solution was apparently very simple: add -bm EdkBmmFile.bmm to ngdbuild command line. This can be done in the Translate Properties GUI pane. It seems that bitgen decides whether to generate _bd.bmm or not based on what's in the ncd file.

/Mikhail

Reply to
MM

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