One of my students is working on musical sound synthesis in FPGA. To allow her to test her solution before the design is ready to be programmed into real FPGA, I needed a solution translating the MIDI file into the stream of MIDI commands which may be read by the VHDL simulator. Unfortunately I was not able to find such a converter ready to use, and therefore I have implemented it myself. I hope that this solution may be useful for others, working with similar problems (and probably may be fixed/improved by others), therefore I have decided to submit it to this group.
Due to some VHDL limitations, the provided toolset first converts the MIDI file to the text file, containing lines with the absolute time, when the particular MIDI command is set, and then bytes belonging to that command. This text file is then interpreted by the provided read_midi entity, which produces the read MIDI commands to the connected synthesizer IP core, at the appropriate simulation time. The output interface of the read_midi entity uses a simple asynchronous handshake system, which allows to easily interface it with the synthesizer.
The Python part of the solution is heavily based on the wonderful Python MIDI library written by Giles Hall, and available at:
My sources, together with the description are available on:
Please note, that the described solution is for simulation only!