Hi,
I need a full code example on how to use a floating multiplier on FPGA for VHDL-2008. What is the document name from XILINX?
Jim's slides on floating multiplier are good, but not full and outdated. It was published on 2007.
Thank you.
Weng
r VHDL-2008. What is the document name from XILINX?
It was published on 2007.
df
I am not an expert for VHDL, but I would be really surprised if the tools w ill be able to synthesize this data type. This VHDL package is meant to be used for simulation.
Xilinx has an IP which does various operations on floating point:
for VHDL-2008. What is the document name from XILINX?
. It was published on 2007.
will be able to synthesize this data type. This VHDL package is meant to b e used for simulation.
o suggest checking out Vivado HLS since (at least IMHO) gives nice producti vity boost when writing floating-point signal processing modules.
Hi Jan,
very good, what you provided is what I want. But can you give more info abo ut Vivado HLS? A pdf document link for Vivado HLS?
Thank you.
Weng
Thank you.
That is not a true statement. Floating point can be used for synthesis if supported by the vendor. I have not needed floating point in a VHDL design so I don't know how widely it is supported, but I know there is nothing special about floating point that makes it unsupportable.
-- Rick
You should be contacting the synthesis and FPGA vendors.
-- Rick
rote:
:A for VHDL-2008. What is the document name from XILINX?
ed.. It was published on 2007.
07..pdfols will be able to synthesize this data type. This VHDL package is meant t o be used for simulation.
://
about Vivado HLS? A pdf document link for Vivado HLS?
Xilinx Vivado synthesis supports VHDL-2008, by enabling a Tcl command: set_param project.enableVHDL2008 1
After entering this command, the Project Settings dialogue box will show a checkbox "Use VHDL 2008". Check this to VHDL-2008 support.
Then you can set individual files to use the "VHDL 2008" file type.
However, be warned that there is currently a problem with getting the IEEE floating point package (float_pkg) to work with this option enabled. Howeve r, previous versions of Vivado, I mean those that have not yet supported VH DL-2008, do actually support the float_pkg library (weird I know).
I have filed a case with Xilinx previously, but I'm not sure of its current status. I believe they are working on this.
If you want to use float_pkg, you need to NOT use the "VHDL 2008" option fo r now. With this, you can use the "*" multiplication symbol to do floating- point multiplications.
Refer to Chapter 5 (pgs. 177 onwards) of the Vivado Design Suite User Guide (v2015.3).
-daniel
te:
PGA for VHDL-2008. What is the document name from XILINX?
ated.. It was published on 2007.
2007..pdftools will be able to synthesize this data type. This VHDL package is meant to be used for simulation.
tp://
fo about Vivado HLS? A pdf document link for Vivado HLS?
a checkbox "Use VHDL 2008". Check this to VHDL-2008 support.
E floating point package (float_pkg) to work with this option enabled. Howe ver, previous versions of Vivado, I mean those that have not yet supported VHDL-2008, do actually support the float_pkg library (weird I know).
nt status. I believe they are working on this.
for now. With this, you can use the "*" multiplication symbol to do floatin g-point multiplications.
de (v2015.3).
-vivado-synthesis.pdf
Hi Danial,
What you provided is what I want.
Thank you,
Weng
rote:
FPGA for VHDL-2008. What is the document name from XILINX?
tdated.. It was published on 2007.
e_2007..pdf
e tools will be able to synthesize this data type. This VHDL package is mea nt to be used for simulation.
info about Vivado HLS? A pdf document link for Vivado HLS?
w a checkbox "Use VHDL 2008". Check this to VHDL-2008 support.
EEE floating point package (float_pkg) to work with this option enabled. Ho wever, previous versions of Vivado, I mean those that have not yet supporte d VHDL-2008, do actually support the float_pkg library (weird I know).
rent status. I believe they are working on this.
n for now. With this, you can use the "*" multiplication symbol to do float ing-point multiplications.
uide (v2015.3).
01-vivado-synthesis.pdfHi Danial,
I have read a Xilinx paper "Floating-Point Operator v7.1 LogiCORE IP Produc t Guide", PG060 November 18, 2015, now another similar one "Vivado Design S uite User Guide", UG901 (v2015.3) September 30, 2015.
Can you describe the differences between them, especially which one must be read and which one can be skipped?
Thank you.
Weng
on FPGA for VHDL-2008. What is the document name from XILINX?
outdated.. It was published on 2007.
ate_2007..pdf
the tools will be able to synthesize this data type. This VHDL package is m eant to be used for simulation.
:
e info about Vivado HLS? A pdf document link for Vivado HLS?
:how a checkbox "Use VHDL 2008". Check this to VHDL-2008 support.
IEEE floating point package (float_pkg) to work with this option enabled. However, previous versions of Vivado, I mean those that have not yet suppor ted VHDL-2008, do actually support the float_pkg library (weird I know).
urrent status. I believe they are working on this.
ion for now. With this, you can use the "*" multiplication symbol to do flo ating-point multiplications.
Guide (v2015.3).
uct Guide", PG060 November 18, 2015, now another similar one "Vivado Design Suite User Guide", UG901 (v2015.3) September 30, 2015.
be read and which one can be skipped?
I haven't read the PG060 Floating-Point Operator product guide, as I don't have a need to read it. I only read user guides on IP Cores (such as the Lo giCore IP products) only when I have a need to use those IPs.
As far as floating-point or fixed-point arithmetic is concerned, I'd rather stick with the IEEE float_pkg and fixed_pkg standardised functions. This m eans, if a tool supports this standard, then all you need is to use these f unctions as if they were standard IEEE functions. Use them normally in your behavioural VHDL code.
This means that I don't use the Floating-Point LogiCORE IP directly, howeve r, XST may infer these IPs from the behavioural VHDL.
LogiCore (or any third-party) IP cores usually will require you to instanti ate those IPs in your VHDL, and makes your code more structural than behavi oural. For floating/fixed-point arithmetic, I find it easier and better to write the equations in behavioural VHDL, using the standard IEEE functions.
- dan
ElectronDepot website is not affiliated with any of the manufacturers or service providers discussed here. All logos and trade names are the property of their respective owners.