How to extend a pulse width without clock!

Due to a chip bug, I have to extend a pulse width(negative)from 10ns to 100ms in CPLD(Altera 7128). But the difficult is that I have no any clock into the CPLD, so the CPLD is pure combination logic. how to extend it in such case?

Help me!

Reply to
peterzhu
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Am not sure you can.. all the logic on the chip can't generate that kind of delay.. but you might find another signal which you can use as a clock A0 if you have a micro.. or ALE.. WR.. RD something like that.. failing that.. an RC off chip :-)

Simon

Reply to
Simon Peacock

"peterzhu" ha scritto nel messaggio news: snipped-for-privacy@posting.google.com...

Can you add some very small components? You can build a very simple monostable by connecting a RC network between two CPLD pins.

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Lorenzo
Reply to
Lorenzo

uups, bad luck - not recommended but if you have enough free pins and logic you and if the timing is not critical it is possible to make free running oscillator without external RC components, just connect uneven count of inverters in ring (ie 3 inverters) as this is astable it will oscillate with pretty high frequency, this could be divided down, but from about

40MHz down to 100ms its pretty long counter ... and this approuch really isnt 'recommended'

as other options build simple RC on IO cells and use that signal

antti

Reply to
Antti Lukats

I have delayed strobe signals several hundred nS with an external series resistor, and used the input capacitance of the chip as the C of the RC network. For mS, you will need an external capacitor, of course. if you want the delay to be asymmetric (like a one-shot), you might need to put a diode in parallel with the R. You feed the signal out one pin, through a series R, to a pin loaded with a cap to ground, and then take the signal in from that pin. This may cause multiple pulses with a delay this long, however. So, you might end up using a 74HC4538 or similar one shot, or a 74HC14 Schmitt trigger to prevent the pulses as the output of the RC crosses the threshold.

Jon

Reply to
Jon Elson

The board is in production, so I can not change the SCH and PCB, all things should be done in CPLD.

Peter

Reply to
peterzhu

You could take two cascaded flip-flops, feed the first with '1' and use your

10 ns strobe as async reset for both. Take a 100 ms (10 Hz) clock or clock enable signal for the FFs and combine both outputs to a 100 ms strobe.

Regards, Stephan Flock

Reply to
Stephan Flock

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