How to extend a pulse width without clock in CPLD!

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peterzhu Contact options for registered users 's Avatar (by Gravatar) posted on
September 4, 2003, 6:13 am
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Due to a chip bug, I have to extend a pulse width(negative)from 10ns
to 100ms in CPLD(Altera 7128). But the difficult is that I have no any
clock into the CPLD, so the CPLD is pure combination logic. how to
extend it in such case?

Help me!

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