how do we connect internals signals(not ports) of submodules in the top level design to trigger ports of the ila core?

hi, how do we connect internals signals(not ports) of submodules in the top level design to trigger ports of the ila core? With core inserter, it is possible to connect signals from many submodules to the same trigger port, but how is this done when you use core generater and manually setup connections of icon and ila cores?

thank you.

Reply to
CMOS
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Instantiate your ILA inside the submodule you want to instrument, there is no reason why these have to be at the top level, you can have up to

15 ILA per chip. You'll have to string the control port down through the hierarchy to the ILA but at least its only one port.

Alternatively, bus all the signals you want to watch into a single instrumentation bus and bring that back up through the hierarchy to your ILA instantiated atthe top level.

CMOS wrote:

Reply to
kayrock66

You can get round this problem by using the Chipscope inserter. This method allows you access to all the signals in the design and you don't need to add anything to your source code. HTH, Syms.

Reply to
Symon

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