Registers initial values with Altera Stratix II

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I've been using X FPGA for years and I often use the following VHDL
initial value assignment, especially for finite state machines,
counters, etc :

signal sCounter : std_logic_vector(7 downto 0) := x"1B";

Using "FPGA Editor", I'm able to validate that the synthesis tool has
correctly interpreted the initial value by checking individual slice FF

Now, my problem.  Not having much experience with A Stratix II FPGA,
I'm a little confused about how the synthesis and fitter tools use the
initial value assignment.  Quartus has a synthesis option of "Power-up
Don't Care" that can be turned off.  Does that means that FF must be
initialized using the Assignment Editor using "Power-Up Level"
attribute?  RTFM didn't help (Quartus II 6.1 Handbook, Stratix II
Device Handbook).  Also, I tried to check the result with "Chip Editor"
but the FF power-up values are not indicated (or I simply don't know
how to show them) so I can't validate power-up conditions.  For the
moment, I don't have access to the hardware (else I would have already
made a simple test to check that issue).

Anyone has a hint about how Quartus Synthesis handle initial values


Re: Registers initial values with Altera Stratix II
Hello Francois,

Please refer him to the Chapter 8, Page 46 of the Quartus II 6.1
Handbook.   In short, Quartus will honor initial or default values in
VHDL, except for state machines.  For an FSM with an asynchronous
reset, it will use the asynchronous reset state as the power-up state.
In the absence of an asynchronous reset, we use the first state in the
enumerated type, or the state that was assigned the encoding
"000..0" with a syn_encoding attribute.

You can verify power-up settings by looking for inverted registers in
the report file It is in the Analysis and Synthesis section under
Register Statistics.   If a register must power-up to one, Quartus will
use not-gate pushback to achieve the effect because all device
registers in Stratix, Cyclone, Stratix II, etc power up to zero.

Hope this helps,
Subroto Datta
Altera Corp.

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