I'm trying to decide on which to use for a project as the main default that may include a number of freelance people.
can you say which of these you actually use (the most) and have the best skills in
Verilog systemVerilog SystemC VHDL Other
And if possible what type of work you use it for in general I dont need to know why you use a particular one - and to avoid flame wars request you dont explain that.
I'm just trying to get a general feel for what people here use regularly.
TIA