Hello,
The information that I find about hard macros is a little bit terse. What I= am missing mainly is how to get to a hard macro. This is nowhere specified= .
Does one start from a simple VHDL design to obtain a hard macro?
What I mainly need is a small component with some inputs and outputs, to wh= ich I can join another component (if you did not guess, this is about dynam= ic partial reconfiguration).
It seems that I need the following:
- An ISE project consisting of an embedded design (got that, and floorplann= ed too) and this component to which I can connect clock, reset, switches an= d LEDs.
- This component in a separate design
- This component combined with logic blocks which connect to the signal del= ivered by the macro.
- The possibility to create a differential bitstream from the macro and the= (macro + logic block)
Is a bus macro then a combination of LUTs which just pass signals through?
Btw. I found a whole lot of papers about reconfiguration, but most of them = seemed more to be about architectures on how to reconfigure, not on the pra= ctical issue of generating bitstream contents for reconfiguration. It seems= that the research with the most practical result is done at the University= of Oslo. I will certainly try GoAhead, but in the meantime I also want to = know the hard way.
Regards,
Jurgen